Alex K. Jones

  • Professor/Secondary Appointment


Dr. Jones’ research interests are broadly in the area of computer architecture.  In particular, his is active in the development of quantum computing.  Recently he has been investigating quantum system codesign including design of basis gates, topologies, and transpilation from resonator devices to systems.  He is also investigating emerging devices for classical computing.  For instance, he is actively developing nanoscale magnetic memory systems including spin-transfer-torque and Racetrack memories with an emphasis on processing in memory. He is well known for advancing the field of sustainable computing with full lifecycle carbon modeling and optimization and his other interests include reliability and fault-tolerance, computing and memories in harsh environments such as space, and compilation techniques for configurable systems and architectures, among others.  He has more than 200 publications in these areas.  His research is funded by NSF, DARPA, NSA, ARO, LPS, foundations, and industry.  Dr. Jones is a Fellow of the IEEE.

Selected Publications

Recent and Selected Papers:

              • E. McKinney, M. Hatridge, A. K. Jones, MIRAGE: Quantum Circuit Decomposition and Routing Collaborative Design using Mirror Gates, Proceedings of the High Performance and Computer Architecture (HPCA) Symposium, 2024.

              • E. McKinney, C. Zhou, M. Xia, P. Lu, M. Hatridge, A. K. Jones, Parallel Drive to Maximize Speed Limits for Quantum Computing, IEEE/ACM International Symposium on Computer Architecture (ISCA), 2023

              • E. McKinney, C. Zhou, M. Xia, P. Lu, M. Hatridge, and A. K. Jones, "Co-Designed Architectures for Modular Superconducting Quantum Computers," in Proceedings of the High Performance Computer Architecture Symposium (HPCA), 2023.

              • J. Zhang, C. Wang, Z. Zhu, A. K. Jones, and Y. Wang, "Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance," in Proceedings of the High Performance Computer Architecture Symposium (HPCA), 2023.

              • S. Ollivier, S. Longofono, P. Dutta, S. Bhanja, A. K. Jones, "CORUSCANT: Fast Efficient Processing-in-Racetrack Memories," in Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022 pp. 784--798.  DOI:  10.1109/MICRO56248.2022.00060 

              • S. Longofono, M. Seyedzadeh, A. K. Jones, "Virtual Coset Coding for Encrypted Non-Volatile Memories with Multi-Level Cells," in Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2022, pp. 1128-1140, DOI: 10.1109/HPCA53966.2022.00086.

              • S. Ollivier, X. Zhang, Y. Tang, C. Choudhuri, J. Hu, and A. K. Jones, "POD-RACING: Bulk-Bitwise to Floating-point Compute In Racetrack Memory for Machine Learning at the Edge," IEEE Micro Magazine, Vol. 42, No. 6, Nov.-Dec., 2022. doi: 10.1109/MM.2022.3195761.

              • S. Ollivier, R. Kawsher, S. Longofono, D. Kline Jr, S. Bhanja, A. K. Jones. "Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories with PIETT," IEEE Transactions on Computing, July 2022, DOI: 10.1109/TC.2022.3188206.

              • A. A. Khan, S. Ollivier, S. Longofono, G. Hempel, J. Castrillon, A. K. Jones. "Brain-inspired Cognition in Next Generation Racetrack Memories," ACM Transactions on Embedded Computing Systems (TECS), March, 2022,

              • S. Longofono, D. Kline, R. Melhem, A. K. Jones. "A CASTLE with TOWERs for Reliable, Secure PCM," IEEE Transactions on Computing, Volume: 70, Issue: 9, Sept. 1 2021, doi: 10.1109/TC.2020.3006852.

              • D. Kline, R. Melhem, A. K. Jones. "FLOWER and FaME: A Low Overhead Bit-level Fault-map and Fault-tolerance Approach for Deeply Scaled Memories," in Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2020, pp. 356-368, DOI: 10.1109/HPCA47549.2020.00037.

              • D. Kline, S. Longofono, R. Melhem, and A. K. Jones, "Predicting Single Event Effects in DRAM," in Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2019, pp. 1-6, doi: 10.1109/DFT.2019.8875328.

              • S. Ollivier, D. Kline, R. Kawsher, R. Melhem, S. Bhanja, A. K. Jones. "Leveraging Transverse Reads to Correct Alignment Faults in Domain Wall Memories," in Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2019, pp. 375-387, doi: 10.1109/DSN.2019.00047.DSN.

              • D. Kline, N. Parshook, X. Ge, E. Brunvand, R. Melhem, P. Chrysanthis, A. K. Jones, "GreenChip: A Tool for Evaluating Holistic Sustainability of Modern Computing Systems," Sustainable Computing:Informatics and Systems, Vol. 22, June 2019, DOI=10.1016/j.suscom.2017.10.001 

              • H. Xu, Y. Alkabani, R. Melhem, and A. K. Jones, "FusedCache: A Naturally Inclusive, Racetrack Memory, Dual-Level Private Cache," IEEE Transactions on Multi-Scale Computing Systems, Volume: 2, Issue: 2, April-June 1 2016, DOI=10.1109/TMSCS.2016.2536020.

              • E. Brunvand, D. Kline, A. K. Jones.  "Dark Silicon Considered Harmful," in Proceedings of the IEEE International Green and Sustainable Computing Conference (IGSC), October 2018, DOI: 10.1109/IGCC.2018.8752110 -- Best Paper Award.

              • \item M. Seyedzadeh, A. K. Jones, and R. Melhem, "Mitigating Wordline Crosstalk Using Adaptive Trees of Counters," in Proceedings of the ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), 2018, pp. 612-623, doi: 10.1109/ISCA.2018.00057. 

              • \item M. Seyedzadeh, A. K. Jones, and R. Melhem, "Enabling Fine-Grain Restricted Coset Coding Through Word-Level Compression for PCM," in Proceedings of the IEEE International Symposium on High Performance Computer Architecture (HPCA), 2018, pp. 350-361, doi: 10.1109/HPCA.2018.00038.